Abstract
Purpose
Traditional level inverter technology has drawbacks in the aspect of Total harmonic distortion (THD) and switching losses for higher frequencies. Due to these drawbacks, two-level inverters have become unprofitable for high-power applications. Multilevel inverters (MLIs) are used to enhance the output waveform characteristics (i.e. low THD) and to offer various inverter topologies and switching methods.
Design/methodology/approach
MLIs are upgraded versions of two-level inverters that offer more output levels in current and voltage waveforms while lowering the dv/dt and di/dt ratios. This paper aims to review and compare the different topologies of MLI used in high-power applications. Single and multisource MLI's working principal and switching states for each topology are demonstrated and compared. A Simulink model system integrated using detailed circuit simulations in developed in MATLAB®–Simulink program. In this system, a constant voltage source connected to MLI to feed asynchronous motor with squirrel cage rotor type is used to demonstrate the efficacy of the MLI under different varying speed and torque conditions.
Findings
MLI has presented better control and good range of system parameters than two-level inverter. It is suggested that the MLIs like cascade-five-level and NPC-five-level have shown low current harmonics of around 0.43% and 1.87%, respectively, compared to two-level inverter showing 5.82%.
Originality/value
This study is the first of its kind comparing the different topologies of single and multisource MLIs. This study suggests that the MLIs are more suitable for high-power applications.
Keywords
Citation
Barnawi, A.B., Alfifi, A.R.A., Elbarbary, Z.M.S., Alqahtani, S.F. and Shaik, I.M. (2024), "Review of multilevel inverter for high-power applications", Frontiers in Engineering and Built Environment, Vol. 4 No. 2, pp. 77-89. https://doi.org/10.1108/FEBE-05-2023-0020
Publisher
:Emerald Publishing Limited
Copyright © 2023, Abdulwasa B. Barnawi, Abdull Rahman A. Alfifi, Z.M.S. Elbarbary, Saad Fahed Alqahtani and Irshad Mohammad Shaik
License
Published in Frontiers in Engineering and Built Environment. Published by Emerald Publishing Limited. This article is published under the Creative Commons Attribution (CC BY 4.0) licence. Anyone may reproduce, distribute, translate and create derivative works of this article (for both commercial and non-commercial purposes), subject to full attribution to the original publication and authors. The full terms of this licence may be seen at http://creativecommons.org/licences/by/4.0/legalcode
1. Introduction
Inverters are DC-to-AC converters that use semiconductor switching devices to transfer electric energy parameter (i.e. voltage, current and/or frequency) at a desired value. Two-level inverters were introduced first. But the significant increase in the applications that requires DC-AC conversion has sparked the studies in inverter technologies (Balal et al., 2022; Orfanoudakis et al., 2010; Rahman and Saleh, 2011). However, two-level inverter soon became less-efficient for most of applications due to high total harmonic distortion (THD) in the output waveforms, switching losses and its limitations for medium voltage application due to dv/dt stress over semiconductor switches (Najafi and Yatim, 2011). To overcome these issues, higher switching frequency is used with a suitable filter to achieve output sinusoidal waveform. However, this will create a problem of switching losses (Balal et al., 2022). Multilevel inverters (MLIs) are used to archive better performance using variety of techniques to overcome the limitations of two-level inverter. MLIs are upgraded versions of two-level inverters that offer more output levels in current and voltage waveforms while lowering the dv/dt and di/dt ratios. Depending on the supply type, such as current source inverters (CSIs) or voltage source inverters (VSIs), the output waveforms are produced as staircases of current or voltage. To obtain low THD, by increasing the number of voltage levels, a suitable topology is illustrated in Figure 1. Approximately, 28.88% of THD for three-level flying-capacitor MLI would be decreased to 18.56% with the use of five-level MLI of the same topology (Rana et al., 2019). Also, it is shown that the two-level inverter with 1 kHz switching frequency generates 115% voltage THD, whereas MLIs develop only 22% and 32% voltage THD (Nordvall, 2011). With this significant difference between the two-level and multilevel techniques, MLI has been opted as the preferable one for many applications like renewable energy (solar/wind power inverters) up to megawatt (MW) power levels and motor-drive applications (Abd Halim et al., 2016). The advantages of MLI are listed as:
Superior efficiency due to lower switching frequencies.
MLI enhances power quality and dynamic stability for the connected utilities.
Lower switching stress over the semiconductors.
Because to its modular and straightforward design, they can be built up to virtually infinite levels.
MLI can be considered as an ideal interface between the utilities and renewable energy sources (Balal et al., 2022; Najafi and Yatim, 2011; Abd Halim et al., 2016).
A comparison between the conventional two-level inverter and MLI is presented in Table 1 (Suresh, 2016).
Table 2 illustrates the resulted THD for conventional two-level and MLIs (Nordvall, 2011).
This paper aims to present an overview of different MLI schemes to identify the pros and cons of each topology. To identify the efficacy of the MLI, a model for MLI with Induction Motor drive (IM) in MATLAB Simulink is developed. At different speed and torque variations, the voltage and current THD responses are obtained and analyzed to demonstrate the inverter performance at different loads.
2. Topologies of multilevel inverter
There are two types of MLIs based on the number of voltage sources utilized to feed the MLIs as follows (Wu and Narimani, 2017a; Akagi, 2019):
Single DC source.
Multiple DC source.
A single voltage source is divided into a number of capacitors to acquire different voltage levels, whereas the second type requires different sources of voltage, whether from multiple batteries or through separate convertor rectifiers linked to renewable energy sources or many others. The classification of MLI is presented in Figure 1.
2.1 Multiple DC source
The MLI topology that uses multiple voltage supplies is cascaded H-bridge (Saleh and Rahman, 2011). This topology uses multiple units of identical H-bridge power cells connected in a series chain to produce high ac voltages. Each power cell is connected to separate and equal DC voltage supply. Advantages can be obtained from the modular structure contributes to low production costs. Also, redundant switching patterns can be achieved, which provides flexibility in switching design. Moreover, this topology can be extended to infinite number of levels to meet the required standard for the output waveform. However, one of the defining shortcomings of this technology is the significant need for separate voltage sources to power the cells (Wu and Narimani, 2017a; Shehu et al., 2016). A five-level CHB inverter is shown in Figure 2 with its switching pattern in Table 3. It consists of two H-bridge cells per phase.
2.2 Single DC source
As per above map, single DC supply MLIs is divided as follows.
2.2.1 Neutral point clamped (NPC-MLI)
Single voltage source is utilized in neutral point clamped MLIs and is split into several capacitors linked in series according to the appropriate number of voltage levels. We shall divide the source into
2.2.2 Active neutral point clamped MLI (ANPC)
This kind of frequency inverter was developed to address one of the drawbacks of the NPC, namely the uneven distribution of losses in the switches, which results in an insufficient distribution of heat inside them. Switches 5 and 6 in Figure 4, for example, control and balance the loads on the switches. However, the entire converter system becomes more expensive and complicated when active clamping switches are used. Table 5 indicates the switching pattern for the three voltage levels.
2.2.3 Neutral point piloted MLI (NPP)
Bidirectional switches are added between the inverter output terminals and the dc bus neutral point to create the NPP inverter topology, which is evolved from the two-level inverter. As a result, the dv/dt and THD of the three-level voltage waveforms produced by this inverter are minimized. But there are certain restrictions with the NPP inverter where each switch position on the inverter requires a series connection of two or more switches depending on the potential rating. This questions the reliability and complexity of the system. Figure 5 shows three-level NPP inverter, and Table 6 indicates its switching states (Orfanoudakis et al., 2010; Wu and Narimani, 2017b; Guennegues et al., 2009).
2.2.4 Flying-capacitor MLI (FLC-MLI)
Figure 6 displays a 5L-FLC arrangement. This inverter is a two-level inverter with cascaded dc capacitors. Each inverter leg contains three flying capacitors with voltage ratings of
Table 8 presents the comparison of consolidated features of the different MLI topologies discussed in this paper (Suresh, 2016; Hoon et al., 2017; Lai and Peng, 1996; Meynard and Foch, 1992; Rodrí et al., 2007; Debnath et al., 2022; Dyanamina and Kumar Kakodia, 2021).
3. Simulation results
A model system integrated using detailed circuit simulations in MATLAB®–Simulink program. In this system, a constant voltage source connected to MLI was used to feed Asynchronous motor with squirrel cage rotor type as shown in Figure 7.
Speed reference was applied on the motor with step changes. Also, the values of the reference torque were stepped up from no load to the maximum torque, and this allows to examine the MLI under various conditions and to verify the response of the motor currents. Figure 8, illustrates the speed and torque reference values for this model.
Figure 9 shows the source voltage response along with the motor three phase currents, speed and torque. It is observed that when the speed is increased, the motor draws larger instantaneous currents, which is reflected in the MLI.
4. Conclusion
With the innovation and growth of industrial sectors on a global and local scale, the need for high-energy converters continues to rise. Increase in significance and demand of MLIs for both low- and high-power applications are observed. This article describes and presents five types of MLI topologies (Rodrí et al., 2007). It is suggested that the MLIs like cascade-five-level and NPC-five-level have shown low current harmonics of around 0.43% and 1.87%, respectively, than two-level inverter showing 5.82%. In order to reduce the number of power switches in multilayer inverters, it is possible to reduce or rearrange the DC input voltages, according to the assessment. Other than that numerous academicians have presented specific topological explanations and resolutions in consideration of the desired use.
Figures
Comparison of two-level inverter and multilevel inverter
S. No. | Two-level inverter | Multilevel inverter |
---|---|---|
1 | Output waveform contains higher THD | Low THD in the output waveform |
2 | Larger switching stress | Low switching stress |
3 | It has limitation with high voltage applications | Can be used for high voltage applications |
4 | Cannot produce high voltages | It can produce high voltage levels |
5 | Larger dv/dt | Low dv/dt |
6 | Increased switching losses due to higher switching frequency | Reduced switching losses because of lower switching frequency |
Source(s): Table courtesy of Suresh (2016)
THD value for the two-level, cascaded five-level, and NPC-five-level inverter
Topology | Two-level | Cascaded five-level | NPC-five-level |
---|---|---|---|
Voltage THD% @ 1kHZ | 114.95 | 29.65 | 31.57 |
Current THD% @ 1kHZ | 5.82 | 0.43 | 1.87 |
Source(s): Table courtesy of Nordvall (2011)
Five-level CHB inverter switching states
Output voltage VAN | Switching state | VH1 | VH2 | |||
---|---|---|---|---|---|---|
S11 | S31 | S12 | S32 | |||
2E | 1 | 0 | 1 | 0 | E | E |
E | 1 | 0 | 1 | 1 | E | 0 |
1 | 0 | 0 | 0 | E | 0 | |
1 | 1 | 1 | 0 | 0 | E | |
0 | 0 | 1 | 0 | 0 | E | |
0 | 0 | 0 | 0 | 0 | 0 | 0 |
0 | 0 | 1 | 1 | 0 | 0 | |
1 | 1 | 0 | 0 | 0 | 0 | |
1 | 1 | 1 | 1 | 0 | 0 | |
1 | 0 | 0 | 1 | E | −E | |
0 | 1 | 1 | 0 | −E | E | |
−E | 0 | 1 | 1 | 1 | −E | 0 |
0 | 1 | 0 | 0 | −E | 0 | |
1 | 1 | 0 | 1 | 0 | −E | |
0 | 0 | 0 | 1 | 0 | −E | |
−2E | 0 | 1 | 0 | 1 | −E | −E |
Source(s): Table courtesy of Elbarbary
Switching states of DC-MLI
Switching state | Device switching status (phase A) | Inverter terminal voltage VAZ | |||
---|---|---|---|---|---|
S1 | S2 | S3 | S4 | ||
P | On | On | Off | Off | E |
O | Off | On | On | Off | 0 |
N | Off | Off | On | On | −E |
Source(s): Table courtesy of Rana et al. (2019)
Switching states for active neutral point clamped MLI
Switching state | Switching states (phase A) | Inverter voltage VAZ | ||||||
---|---|---|---|---|---|---|---|---|
S1 | S2 | S3 | S4 | S5 | S6 | |||
P | 1 | 1 | 0 | 0 | 0 | 1 | E | |
O | OU1 | 0 | 1 | 0 | 0 | 1 | 0 | 0 |
OU2 | 0 | 1 | 0 | 1 | 1 | 0 | ||
OL1 | 0 | 0 | 1 | 0 | 0 | 1 | ||
OL2 | 1 | 0 | 1 | 0 | 0 | 1 | ||
N | 0 | 0 | 1 | 1 | 1 | 0 | −E |
Source(s): Table courtesy of El-Hosainy et al. (2017)
Switching states for NPP-MLI
Switching state | Switching state (phase A) | Inverter phase Voltage VAZ | |||
---|---|---|---|---|---|
S1 | S2 | S3 | S4 | ||
[P] | 1 | 0 | 1 | 0 | E |
[O] | 0 | 0 | 1 | 1 | 0 |
[N] | 0 | 1 | 0 | 1 | −E |
Source(s): Table courtesy of Orfanoudakis et al. (2010)
Switching states for 5L-multilevel FLC inverter
Switching state (phase A) | Inverter phase voltage VAZ | |||
---|---|---|---|---|
S1 | S2 | S3 | S4 | |
1 | 1 | 1 | 1 | 2E |
1 | 1 | 1 | 0 | E |
0 | 1 | 1 | 1 | |
1 | 0 | 1 | 1 | |
1 | 1 | 0 | 1 | |
1 | 1 | 0 | 0 | 0 |
0 | 0 | 1 | 1 | |
1 | 0 | 0 | 1 | |
0 | 1 | 1 | 0 | |
1 | 0 | 1 | 0 | |
0 | 1 | 0 | 1 | |
1 | 0 | 0 | 0 | −E |
0 | 1 | 0 | 0 | |
0 | 0 | 1 | 0 | |
0 | 0 | 0 | 1 | |
0 | 0 | 0 | 0 | −2E |
Source(s): Table courtesy of Rana et al. (2019)
Comparison of features of different multilevel inverter topologies
S. No. | Topology | Neutral point diode clamped | Flying capacitor | Cascaded H-bridge |
---|---|---|---|---|
1 | DC link Capacitors | |||
2 | Switches with freewheeling diodes | |||
3 | Clamping Diodes | 0 | 0 | |
4 | Clamping Capacitors | 0 | 0 | |
5 | Voltage Unbalancing | Average | High | Very Small |
6 | Advantages | sturdy design and uses the least quantity of DC-link capacitors necessary (less voltage imbalance problems) | Voltage balancing of DC-link capacitors can be accomplished using phase redundancy | Due to its modularity, it has an easy structure and control |
7 | Disadvantages | Increased number of clamping diodes with the increasing number of levels | Bulky size and more costly with more complex voltage balancing control algorithms | Requires multiple separate DC sources |
8 | Applications | Motor Drive System, STATCOM | Motor Drive System, STATCOM | Motor Drive System, PV, Fuel cells, Battery system |
Source(s): Table courtesy of Hoon et al. (2017)
References
Abd Halim, W., Ganeson, S., Azri, M. and Azam, T.T. (2016), “Review of multilevel inverter topologies and its applications”, Electronic and Computer Engineering, Vol. 8 No. 7, pp. 51-56.
Akagi, H. (2019), “Multilevel converters–configuration of CirCuits and systeMs”, Power Electronics in Renewable Energy Systems and Smart Grid: Technology and Applications, pp. 153-218.
Balal, A., Dinkhah, S., Shahabi, F., Herrera, M. and Chuang, Y.L. (2022), “A review on multilevel inverter topologies”, Emerging Science Journal, Vol. 6 No. 1, pp. 185-200.
Debnath, T., Gopakumar, K. and Umanand, L. (2022), “DC-Link capacitors voltage control using a multi-phase induction motor load driven by a multilevel inverter”, IECON 2022-48th Annual Conference of the IEEE Industrial Electronics Society, IEEE Xplore, 2236294.
Dyanamina, G. and Kumar Kakodia, S. (2021), “Adaptive neuro fuzzy inference system based decoupled control for neutral point clamped multi level inverter fed induction motor drive”, Chinese Journal of Electrical Engineering, IEEE, Vol. 7 No. 2, pp. 70-82.
El-Hosainy, A., Hamed, H.A., Azazi, H.Z. and El-Kholy, E. (2017), “A review of multilevel inverter topologies, control techniques, and applications”, 2017 Nineteenth International Middle East Power Systems Conference (MEPCON), IEEE, pp. 1265-1275.
Guennegues, V., Gollentz, B., Meibody-Tabar, F., Raël, S. and Leclere, L. (2009), “A converter topology for high speed motor drive applications”, 2009 13th European Conference on Power Electronics and Applications, IEEE, pp. 1-8.
Hoon, Y., Mohd Radzi, M.A., Hassan, M.K. and Mailah, N.F.J.E. (2017), “Control algorithms of shunt active power filter for harmonics mitigation”, A Review, Vol. 10 No. 12, p. 2038.
Lai, J.-S. and Peng, F.Z. (1996), “Multilevel converters-a new breed of power converters”, IEEE Transactions on Industry Applications, Vol. 32 No. 3, pp. 509-517.
Meynard, T.A. and Foch, H. (1992), “Multi-level conversion: high voltage choppers and voltage-source inverters”, PESC'92 Record. 23rd Annual IEEE Power Electronics Specialists Conference, IEEE, pp. 397-403.
Najafi, E. and Yatim, A.H.M. (2011), “Design and implementation of a new multilevel inverter topology”, IEEE Transactions on Industrial Electronics, Vol. 59 No. 11, pp. 4148-4154.
Nordvall, A. (2011), “Multilevel inverter topology survey”, Master of Science Thesis in Electric Power Engineering, Department of Energy and Environment Division of Electric Power Engineering Chalmers University of Technology Göteborg.
Orfanoudakis, G., Sharkh, S., Yuratich, M. and Abusara, M. (2010), “Loss comparison of two and three-level inverter topologies”, 5th IET International Conference on Power Electronics, Machines and Drives (PEMD 2010), IET, pp. 1-6.
Rahman, M.A. and Saleh, S. (2011), An Introduction to Wavelet Modulated Inverters, John Wiley & Sons.
Rana, R.A., Patel, S.A., Muthusamy, A., Lee, C.W. and Kim, H.-J. (2019), “Review of multilevel voltage source inverter topologies and analysis of harmonics distortions in FC-MLI”, Electronics, Vol. 8 No. 11, p. 1329.
Rodríguez, J., Bernet, S., Wu, B., Pontt, J.O. and Kouro, S. (2007), “Multilevel voltage-source-converter topologies for industrial medium-voltage drives”, IEEE Transactions on Industrial Electronics, Vol. 54 No. 6, pp. 2930-2945.
Saleh, S. and Rahman, M.A. (2011), Introduction to Power Inverters, Wiley Online Library. doi: 10.1002/9780470647998.ch1.
Shehu, G.S., Kunya, A.B., Shanono, I.H. and Yalçınöz, T. (2016), “A review of multilevel inverter topology and control techniques”.
Suresh, L.P. (2016), “A brief review on multilevel inverter topologies”, 2016 International Conference on Circuit, Power and Computing Technologies (ICCPCT), IEEE, pp. 1-6.
Wu, C. (2006), “DiodeClamped multilevel inverters”, Wiley-IEEE Press, pp. 143-177, doi: 10.1002/9780471773719.ch8.
Wu, B. and Narimani, M. (2017a), High-power Converters and AC Drives, John Wiley & Sons.
Wu, B. and Narimani, M. (2017b), Other Multilevel Voltage Source Inverters, 2nd ed., Wiley-IEEE Press, pp. 185-223, doi: 10.1002/9781119156079.ch9.
Young, C.-M., Chu, N.-Y., Chen, L.-R., Hsiao, Y.-C. and Li, C.-Z (2012), “A single-phase multilevel inverter with battery balancing”, IEEE Transactions on Industrial Electronics, Vol. 60 No. 5, pp. 1972-1978.