An efficient code compression for MIPS32 processor using dictionary and bit-mask based static and dynamic frequency algorithm

Abstract

Purpose

Memory plays a vital role in designing embedded systems. A larger memory can accommodate more and larger applications but increases cost area, as well as energy requirements. Hence, the purpose of this paper is to propose code compression techniques to solve this issue by minimizing the code size of the application program by compressing the instructions with higher static frequency.

Design/methodology/approach

The idea is based on the static and dynamic frequency-based algorithm combined with bit mask and dictionary-based algorithm for MIPS32 processor, in order to minimize the code size and improves compression ratio.

Findings

The experimental result shows that the proposed system achieves up to 67 percent compression efficiency.

Originality/value

The paper presents enhanced versions of the code compression technique.

Citation

Ramani, G. and Geetha, K. (2016), "An efficient code compression for MIPS32 processor using dictionary and bit-mask based static and dynamic frequency algorithm", COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, Vol. 35 No. 5, pp. 1774-1785. https://doi.org/10.1108/COMPEL-11-2015-0429