PWB Build‐up Technologies: Smaller, Thinner and Lighter

Abstract

Ball grid arrays, chip‐sized grid arrays, direct chip attach and flip chip are packages which are increasingly penetrating the market. However, the challenge to PCB fabricators will be how to meet the need imposed by these packages in terms of increased circuit density. Shrinking traces and spaces certainly offer some relief, but traces below 3 mils on 2 mil core will not meet the signal integrity requirements of high speed logic. The real opportunity to increase density is the reduction of via diameters and the adoption of alternative via structures. Non‐drilled vias offer the newest opportunity to increase board density while also reducing costs and board thickness. This paper looks at twelve ‘build‐up technologies’ that all employ non‐drilled vias as well as buried and blind vias. The design rules, materials, manufacturing process, structures, reliability and applications of many of these will be examined and compared. Highlighted will be the application to PCMCIA card (PC card) design and fabrication. Finally, preliminary cost comparisons will be given in order to position these technologies against standard PCBs.

Citation

Holden, H. (1997), "PWB Build‐up Technologies: Smaller, Thinner and Lighter", Circuit World, Vol. 23 No. 2, pp. 14-17. https://doi.org/10.1108/03056129710370141