Characterization of PCB plated‐through‐hole reliability using statistical analysis
Mark J. Tardibuono
(Isola Laminate Systems Corp., Phoenix, Arizona, USA)
677
Abstract
Various test methods are used to characterize PCB plated‐through‐hole reliability. One such method is the interconnect stress test. The results from this test are often used to qualify PCB materials and/or fabricators. This paper will discuss how certain statistical analysis techniques may be used to decipher the results, and predict capabilities of PCB materials and/or processes.
Keywords
Citation
Tardibuono, M.J. (2005), "Characterization of PCB plated‐through‐hole reliability using statistical analysis", Circuit World, Vol. 31 No. 1, pp. 8-15. https://doi.org/10.1108/03056120510553176
Publisher
:Emerald Group Publishing Limited
Copyright © 2005, Emerald Group Publishing Limited