Electronic Circuits World Convention, Cologne, Germany 7-9 October 2002

Citation

Goosey, M. (2003), "Electronic Circuits World Convention, Cologne, Germany 7-9 October 2002", Circuit World, Vol. 29 No. 2. https://doi.org/10.1108/cw.2003.21729bac.001

Electronic Circuits World Convention, Cologne, Germany 7-9 October 2002

Electronic Circuits World Convention, Cologne, Germany 7-9 October 2002

Keywords: Conference, Germany, PCB

This year, Cologne played host to the combined event of the Electronic Circuits World Convention 9 and the EPC 2002 trade show. They were held in the Koln Messe between Monday 7th October and Thursday 10th October with the conference beginning and ending 1 day before the show. The Electronic Circuits World Convention offered delegates the opportunity to listen to 3 days of presentations detailing new developments in PCB technology from around the world. Considering the still difficult times that the PCB industry is experiencing, the attendance was about as good as could be expected but very much lower than was achieved at previous conventions. Perhaps not surprisingly, there was a relatively strong representation in terms of posters and papers from both Chinese manufacturers and suppliers.

The conference began with the opening ceremony and keynote speeches on the morning of Monday 7th October (see plate 1). These included a presentation from the Lord Mayor of the City of Cologne as well as a speech by Mr. Charles Wu of the Compeq Manufacturing Company of Taiwan. As many PCB manufacturers have transferred their production to China, Mr. Wu’s overview of the implications of moving investments to the Far East was very apposite. Following this opening session and a lunch break the conference proper got underway with three parallel sessions of papers covering the subjects of Management, Materials and Processes.

Plate 1 Delegates at the opening ceremony

As it was only possible to attend one of each of the three sessions this report can give no more than an overview of some of the papers presented. For those needing additional information from the presentations, the proceedings are available from the EIPC in CD-ROM format. Also, I have included in this issue the paper given at the conference by George Allardyce et al. of Shipley on microvia filling by copper electroplating and it is the intention that other papers will appear in future issues of Circuit World so that they may be shared with a wider audience.

The Monday afternoon Management session covered the theme of “Environmental Considerations” and there were four presen- tations from speakers from Europe, North America and the Far East. Dr. Martin Goosey of Shipley Europe Ltd in Coventry, England opened the session with a paper highlighting important legislation that was emerging and which would have a significant impact on the whole electronics supply chain including PCB fabricators. He then went on to briefly describe work being undertaken in the UK on a number of key environmental projects aimed at helping the UK PCB industry to adopt best practices and a sustainable approach to its activities. These projects included a study of the opportunities for recycling both end of life PCBs and 25 l plastic drums. Work on a project to destroy organic contaminant in PCB manufacturing effluent was also described. Much of this work was being carried out with funding from UK Government Agencies or from the European Commission.

Alan Rae of the Cookson Electronics Inc., Foxborough, MA, USA then gave a presentation on “Meeting WEEE and other Environmental Requirements – A Materials Perspective”. At the outset he stated that there was strong international resistance to the prohibition of lead in electronics and it was now estimated that, worldwide, the percentage of electronics which would be lead free in 2006 had recently been revised down to only 25 per cent. He then went on to mention the importance of Design for the Environment and key aspects such as avoiding the use of toxins, and designing specifically for recyclability and for demanufacturing. Care was needed when replacing one component with another, e.g. the use of tin and silver as a replacement for lead in solders. It had been estimated that the United States would need one extra power station in order to cover the additional energy requirements of moving to lead free assembly. Alan also highlighted that the cost of repairing electronics often made the operation too expensive, and that the value of second hand components had dropped significantly. Recovery of palladium from end of life electronics was also becoming less worthwhile. The quantity of palladium per tonne of electronics scrap was reducing by 50 per cent every 5 years and was now well below the former figure of between 50 and 150 g/tonne. Alan also highlighted that the biggest source of lead in landfill came from cathode ray tubes. In conclusion he highlighted the need to be proactive and to stay informed. It was important to begin at the design stage and for individuals to work with their trade associations and to communicate regularly with customers.

The next paper in this session was entitled “A Biological Approach in Waste Treatment” and was presented by Li Fude of the China Circuit Technology (Shantou) Corporation, China. His presentation covered the use of novel bacteria to treat PCB wastewater, which typically contained complexants, a high COD and between 30 and 40 g/l of copper. He began by highlighting the disadvantages of conventional methods and these included the relatively complex treatment procedures, the high cost and the propensity to form sludge. This new method used special bacteria, which were heavy metal resistant, to replace chemicals in a simpler process that offered lower costs with less sludge formation. The method utilised the catalytic capability of specific enzymes within the bacteria and some form of electrostatic attraction. Data was given to illustrate how quickly the process worked and significant reductions in metal levels took place in just a few minutes. The bacteria were very resilient and could operate over a wide pH range although exposure to disinfectant and high temperatures e.g. boiling did kill them. Metals such as chromium, copper and nickel could all be treated. Several factories in China were already using the process and any metal containing sludge that was generated could be sent to a refinery for metal recovery.

The final paper was given by Dr. Bernard Kempfel of Ruwel Werke in Germany and in his presentation he described a new water treatment plant at their facility in Geldern which had been installed to meet current consent levels, save and recycle water and have best available technology. The plant divided the effluent from the manufacturing into five discrete streams and used a band filter to remove photoresist residues. Acid and alkali streams were subsequently combined during the treatment process and the cost of treatment was in the region of 0.59 euros per l. Since installing this new plant the amount of sludge produced per unit mass of board produced had been reduced by a factor of six compared to the 1997 pre installation figures. The plant cost 3 million deutsch marks and three years to install. The payback period was estimated to be in the region of 5-8 years depending on the production volume.

The second afternoon session had two papers and the first of these, given by Jia Luo, also of China Circuit Technology Corporation, was on the subject of “Factors affecting the RF power of mobile phones and relative control methods”. Some of the key important variables described at the start of the presentation were PCB material choice, board thickness, signal line profiles, impedance matching, material absorption and surface contamination. RF boards did not handle typical DC or AC signals but rather they tended to carry square wave or pulse signals.

Harry Fuerhaupter of Atotech USA Inc. then gave a presentation on high performance multilayer bonding systems. He compared the properties of various high performance dielectrics and stated that, in general, the adhesion of copper to these materials tended to get worse as the glass transition temperature increased. The traditional black oxide process was still widely used in much PCB bonding but alternative processes were gaining in popularity and the example of a combined immersion tin and silane based process was given. The main part of the presentation then focussed on work carried out by Atotech to optimise the performance of this type of process. The tin layer was in the region of 0.15 microns thick and it was found to change the chemical properties of the copper surface whilst maintaining the topography. The use of silane was determined to give no effect on the adhesion and its use was subsequently avoided. The tin formed an intermetallic at the copper surface and peel strengths of 1.2 N/mm were achieved with high Tg epoxy resins. This new horizontal process was stated to be compatible with the company’s direct plate and electroless copper processes.

One of the three initial sessions the next day was on “Embedded Materials” and the first paper was given by Tarja Rapala-Virtanen of Aspocomp, Salo, Finland. This paper focuses on work by Aspocomp to evaluate the use of buried components in High Density Interconnects with particular emphasis on passive integration and materials processing. Tarja began by reviewing the recent history of component evolution from dual in line packages through to the current chip scale packages that are forcing interconnect providers to develop finer pitch substrates. She cited the “Moore’s Law” of the PCB industry by saying that via density doubles every 3 years. The use of integrated passives was becoming increasingly necessary to give more surface area for silicon as well as improved electrical performance, enhanced reliability and increased throughput. Use had been limited to date by the diverse range of materials and processes available and the lack of a developed infrastructure from designer through supplier to end-user. The development of suitable automated optical inspection was also necessary. For buried resistors, most applications could be satisfied by resistors having values of between 20 Ohms and 20 kOhms. Various material types were given but whatever material was used the resistors needed to be consistent in value and easy to trim. The use of ceramic and carbon thick film pastes was cited and these materials allowed several value pastes to be used on one layer. The need to carry out a cost analysis for each model was essential. The second part of the presentation focused on HDI/microvia fabrication requirements. With FR4 type laminate materials the need to optimise the profile of the laser beam used to drill vias was stated as being critical to good via profile formation. With a typical Gaussian profile the vias formed could exhibit protruding glass but this could be minimised with an appropriate beam profile. Laser drillable glass was now also available as were non-woven glass prepregs, Aramid and non-woven PTFE reinforced materials. The presentation concluded with a discussion of the future of HDI and the growing need to introduce stacked vias.

Robert Crosswell from the Motorola Advanced Technology Centre in Schaumburg, Illinois, USA then described a suite of technologies that his company had developed for embedding resistors, capacitors and inductors into printed wiring boards. Resistors were the easiest components to target. If a capacitor material capable of giving 16 pF/mm² was available it would satisfy the requirements for over 50 per cent of the capacitors used in these types of applications. Motorola had chosen a polymer thick film route for depositing resistor component structures and as printed they typically had a 20 per cent untrimmed tolerance and a power handling capability of 30 mW/mm². Values of between 35 ohms and 1 MOhm per square could be achieved. Motorola had worked to enhance the reliability of the components by improving the stability of the ink formulations. Less than 2 per cent changes in resistance could be achieved after 500 liquid to liquid thermal cycles and they could be laser trimmed to give a 1 per cent tolerance.

Capacitors had been produced and these were currently limited to values of 1 pF/mm², with typical embedded values ranging from 0.5 to 4 pF. A mezzanine capacitor concept was also developed which utilised a photodefinable resin that gave capacitance values from 1 pF to 500 pF. The dielectric constant of this material was around 21 at 1 MHZ and reduced to 14 in the gigahertz region. Inductors were formed using a two layer offset winding structure with a layer of dielectric as a separator. The whole process flow was presented and this included the incorporation of the resistors and capacitors on the surface of the board but below the subsequently built up layers. An example of replacing a ceramic hybrid with an organic based solution was given and it had been demonstrated that embedded passives could be used in RF modules if the design was properly analysed and carried out.

The final paper of this session was given by Mark Doyle of DuPont Microcircuit Materials in Research Triangle Park, North Carolina, USA and this was entitled “Advanced Embedded Passives Technologies – Putting Ceramic Components into Organic PWBs”. The presentation was used to demonstrate some of the work DuPont had undertaken during a project which was supported by the US Department of Commerce and NIST. Mark began by stating that having a wide range of component values available was the key to enabling cost savings to be made. DuPont had worked in several areas and with several technologies based on Low Temperature Co-fired Ceramic, as well as laminate and thick film based approaches; ideally they would like to provide the performance of ceramics in an organic based printed circuit board. The key feature of the approach reported here by DuPont was a process whereby ink was printed onto copper foil and fired at 900°C in a nitrogen atmosphere. (It had been found advantageous to pre-anneal the copper at 900°C before the component deposition and firing stages.) This fired sheet was then used in a conventional PCB manufacturing process in which the films were used as inner layers and the resistors were buried inside the board structure. A key feature of the process was an encapsulation stage that was used to protect adjacent FR4 materials from damage during laser trimming. The encapsulant was deposited over the components. A similar process had been developed for both resistors and capacitors and values of almost 1 μF/square inch had been achieved. Thick film resistors around 18 μm thick had been produced in good yield as long as the size did not get too large. An upper size limit of 80 mils square was given; if large sizes were used there was a tendency for the components to exhibit cracking. The components produced had very ESD and thermal cycling performance and DuPont expected to commercialise fully the process early in 2003. DuPont had worked with Delphi Automotive Systems on this project.

Session 2 of the materials presentations on Tuesday morning began with a paper by Markus DiMarcoberardino of ESI, Germany and this covered the “Implementation of laser technology in alternative applications on PCBs”. The presentation covered the use of high power UV lasers and the example given was of a 5 W laser operating at 30 kHz at 355 nm and using both Gaussian and shaped beam profiles. This laser had been used for producing microvias in glass reinforced BT laminate materials and in the direct ablation of solder masks. A material identified as ABF with no copper on its surface had also been drilled and holes as large as 150 microns in diameter could be produced without the need to use a treppaning technique. The laser was capable of drilling more than 700 vias per second and the beam was moved using a combination of linear motors and a galvo system.

Markus then went on to describe the laser patterning of outer layer resists in a technique where resist was removed to reveal underlying copper which could then be tin plated to form an etch resist mask. The remaining resist could then be removed to expose to copper which was etched to form the circuit pattern. Laser direct imaging of photoresists had also been studied and 30 micron wide lines could be produced. Solder mask patterning by laser was described and it was stated that this technique would enable extra circuit routing to be achieved. Throughput achieved was determined by the thickness of the solder mask.

The next presentation attended was that by Martin Cotton of Viasystems and he described his company’s approach to the manufacture of “Microcoax” circuitry for high frequency applications. Martin began by reconfirming the need to operate at higher frequencies and greater bandwidths. Whilst optical interconnection could provide one solution at these higher frequencies, he pointed out that there was still much more that could be achieved using conventional copper. Martin also stated that there was a potential conflict between the need to produce greater interconnection densities through fine lines and spaces and the move to higher frequencies. At 10 Ghz copper has a skin depth of around 0.225 microns and this meant that tracks would have to get wider at higher data rates. Routing, track density and crosstalk would become increasingly important to circuit designers in the future. The microcoax technology described in this presentation employed laser machining of trenches and subsequent copper plating to produce a 360° shield of metal around a conductor which gave total EMC protection. Based on conventional PCB processing techniques microcoax offered the potential for a reduction in multiplexing as well as faster rise times and better bit error rates. Signal rise times of less than 60 ps had been achieved with virtually zero cross talk. Microcoax had the capability to double interconnect densities compared to traditional differential pairing strip line technology, as well as doubling I/O connector densities.

Dr. Jurgen Herbert of Vantico AG, Basel, Switzerland opened the Tuesday afternoon materials session with a paper entitled “New Dielectric Process Scheme for HDI Printed Wiring Boards”. In this presentation Dr Herbert described a novel low cost epoxy based dielectric material that could be used to build up HDI boards for both photo and laser ablation processing. The liquid dielectric was applied to the substrate by using double sided roller coating, vertical roller coating or flood screen printing to give a 25-30 micron thick coating in a single pass. A copper foil was then laminated or plated on the top surface, with the resultant sandwich being cured during a subsequent press cycle. Adhesion values of >1.0 N/mm had been achieved and with the lamination route no pre-treatment was required. During the process the insulating layer was uniformly equalised and vias were plugged. The importance of obtaining a balance between the Tg of the materials and its flow characteristics was very important and an understanding of this balance had been achieved using rheometric techniques to monitor the visco-elastic properties and to control the Tg. The aim was to achieve excellent cure latency without blister formation. The presentation concluded with a discussion of the benefits of the process compared to routes using a more conventional resin coated copper foil approach. These benefits included lower materials cost, improved shelf life, improved reliability and an overall lower process cost.

There were three other papers in this session with two coming from Hitachi and one from Matsushita. Akio Takahashi of Hitachi Ltd, Ibaraki-ken, Japan, described a new heat resistant epoxy-silicon hybrid material for printed wiring boards. The new material had epoxy-silicon oligomers incorporated into an epoxy resin matrix at the nanometre level (1-3 nm) and this gave excellent cured properties such as a thermal expansion coefficient that was two thirds of those found in conventional materials. The material had dielectric constant of 5.0 and a loss of 0.02 at 1 MHz.

Atushi Takahashi of Hitachi Chemical Company Ltd’s Research and Development Laboratories in Japan, then gave a presentation entitled “Ultra thin and Low stress insulation material for Flip Chip Attachment”. One of the key demands when developing new material for the next generation of electronics packaging was to be able to meet the thermomechanical reliability requirements. This needed a material that had matched thermal expansion, a low modulus and high elongation with low moisture uptake. The new material was 70 per cent volume filled with micro/nanodispersed inorganics that gave a low CTE and good thermal stability. The dielectric constant was between 3.4 and 3.6 at 1 GHz with the loss being 0.008 at the same frequency. The material had an elongation of between 1 and 7 per cent depending on the filler loading and exhibited much lower stress than conventional epoxy materials. It also had good thermal stability to 300°C, better moisture uptake performance than FR4 and performed well in laser drilling. Applications for this material were envisaged in packaging substrates, CSP and other advanced packaging where ultra thin cores and sequential build up could be used.

The final presentation of this session was by Yukio Matsushita of Matsushita Electronic Works Ltd, Osaka, Japan and it covered the materials for printed wiring boards for high speed transmission applications and an evaluation of their electrical characteristics. Material used in these applications generally needed low dielectric constants and low dielectric losses although for buried capacitors a high dielectric constant was needed. Also, the thinner the insulator used the better since this helped to reduce resonance levels. Illustrations were given that showed how the current in a conductor migrated to the skin of the conductor as frequency increased. At 1 MHz it was carried through the whole section of the conductor but at 1 GHz it was limited to the outer 2 microns of the conductor and thus the surface roughness of the conductors was becoming increasingly important. It was stated that for high speed transmission applications PWB electrical characteristics could be improved considerably by employing a capacitor structure to the power system and a low loss material to the signal system.

The following materials session was entitled “Conducive Properties of Metals” and contained papers by Atotech, SAS Circuits and MEC. The Atotech paper was presented by Eckart Kluasmann and detailed a new economical process for metallisation of dielectrics for Wafer Level Chip Size packaging. This work had been carried out in a joint project with the Fraunhofer Institute in Berlin and focussed on wafer level distribution using plasma enhanced chemical vapour deposition (PECVD). An initial seed layer was deposited by PECVD and this was followed by a 0.1 micron thick electroless nickel deposition which could then be electroplated. The process had been evaluated with Dow’s photosensitive benzocyclobutene material and it was found that the PECVD method gave better results than a conventional sputtering process in terms of shear testing on solder bumps.

Michael Jouppi’s paper for SAS Circuits Inc. covered the Thermal Characterisation of PCB Conductors and in particular highlighted the history and limitations of existing methods. The original IPC method was very conservative and didn’t account for differences between air and vacuum environments. A new IPC standard was due to be released in 2003 (Standard for Determining Current Carrying Capacity in a Printed Board Design IPC 2152).

The final paper of this session was given by Toshiko Nakagawa of MEC Company Limited and this covered the relationship between the self annealing of plated copper and copper surface treatment. This paper discussed grain growth in copper during self annealing and the factors that influenced the changes in crystal structure during this annealing. Additives in the copper plating affected the self annealing as did plating current density. The paper highlighted the importance of the changes in the copper after plating that could influence the effectiveness of any subsequent surface treatment. Quality control of the plated copper was said to be one of the most important issues impacting the reliability of the final PCB.

There were numerous other interesting papers covering a whole range of management and technical topics and on the Wednesday afternoon, for example, the Management session covered the all-important topic of Global Market Conditions with presentations from such industry experts as Hayao Nakahara and Walt Custer. “Nakahara” detailed the status of microvia technologies in Japan and “Walt” gave a presentation entitled “Avoiding Market Surprises: Electronic Equipment Inventories and Orders as leading indicators”. The session concluded with a presentation on the Global Printed Circuit Industry after 2001 from an Asian perspective by Shiuh-Kao Chiang of Prismark LLC.

It should also be noted that there was an extensive display of posters and these were exhibited in a special area in the accompanying EPC Trade Show Exhibit Hall. Poster presenters were also given the opportunity to give a short verbal presentation of their work and there was again a wide range of posters covering many new topics from companies and organisations in Europe, the USA and the Far East.

The conference concluded with overviews of the ever-changing business environment from European, American and Asian perspectives. Awards were presented to the presenters of papers from the conference that were deemed to be the most popular, the most attractive and the best presented. There followed an evening “get together” party in Cologne’s Gurzenich and it was here that the Best Paper Award was given.

In a review of this type it is only possible to offer an overview of the presentations given at the Electronic Circuits World Convention 9. However, I hope that it has been possible to demonstrate that this was an excellent conference with some very high quality, novel and interesting presentations covering a broad range of topics of interest to the industry from a global perspective. It is a pity that the prevailing poor economic conditions prevented more people from attending both the conference and the accompanying show. For those wishing to obtain details of the other presentations and to have more technical information, I can recommend the proceedings of the conference which are available on CD-ROM from the EPIC. For more details contact: jwarnier@eipc.org or mweinhold@eipc.org.

Martin GooseyOctober 2002