Interconnect stress testing (IST) – an overview of its development and capabilities

Abstract

Focuses on the development and capabilities of interconnect stress testing (IST), a stress testing method for printed circuit boards (PCBs) that is fast, repeatable and reproducible. IST technology was originally developed in the mid 1980s. Notes that using IST as an electrical test delivers a capability to remove the human factor from the decision making process of product acceptance or rejection and that the technology is emerging as an important test methodology for the assessment of PCB interconnects. IST has the capability to effectively and rapidly quantify the integrity of plated through holes and the unique ability to identify the presence and levels of post separations within a multilayer board.

Citation

Stewart, D. (2003), "Interconnect stress testing (IST) – an overview of its development and capabilities", Circuit World, Vol. 29 No. 2, pp. 20-26. https://doi.org/10.1108/03056120310454961